The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 20, 2011
Filed:
Dec. 17, 2010
Swapnil Y. Dhumal, Brentwood, MO (US);
Lawrence P. Flannery, Warrenton, MO (US);
Thomas A. Torack, Oakland, MO (US);
John A. Pitney, St. Peters, MO (US);
Swapnil Y. Dhumal, Brentwood, MO (US);
Lawrence P. Flannery, Warrenton, MO (US);
Thomas A. Torack, Oakland, MO (US);
John A. Pitney, St. Peters, MO (US);
MEMC Electronics Materials, Inc,, St. Peters, MS (US);
Abstract
Methods are provided for etching and/or depositing an epitaxial layer on a silicon-on-insulator structure comprising a handle wafer, a silicon layer, and a dielectric layer between the handle wafer and the silicon layer. The silicon layer has a cleaved surface defining an outer surface of the structure. The cleaved surface of wafer is then etched while controlling a temperature of the reactor such that the etching reaction is kinetically limited. An epitaxial layer is then deposited on the wafer while controlling the temperature of the reactor such that a rate of deposition on the cleaved surface is kinetically limited.