The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 08, 2011
Filed:
May. 20, 2008
Anthony I. Chou, Beacon, NY (US);
Toshiharu Furukawa, Essex Junction, VT (US);
Wilfried Haensch, Somers, NY (US);
Zhibin Ren, Hopewell Junction, NY (US);
Dinkar V. Singh, White Plains, NY (US);
Jeffrey W. Sleight, Ridgefield, CT (US);
Anthony I. Chou, Beacon, NY (US);
Toshiharu Furukawa, Essex Junction, VT (US);
Wilfried Haensch, Somers, NY (US);
Zhibin Ren, Hopewell Junction, NY (US);
Dinkar V. Singh, White Plains, NY (US);
Jeffrey W. Sleight, Ridgefield, CT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A semiconductor-on-insulator structure includes a buried dielectric layer interposed between a base semiconductor substrate and a surface semiconductor layer. The buried dielectric layer comprises an oxide material that includes a nitrogen gradient that peaks at the interface of the buried dielectric layer with at least one of the base semiconductor substrate and surface semiconductor layer. The interface of the buried dielectric layer with the at least one of the base semiconductor substrate and surface semiconductor layer is abrupt, providing a transition in less than about 5 atomic layer thickness, and having less than about 10 angstroms RMS interfacial roughness. A second dielectric layer comprising an oxide dielectric material absent nitrogen may be located interposed between the buried dielectric layer and the surface semiconductor layer.