The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 18, 2011
Filed:
Apr. 23, 2007
John M. Grant, Austin, TX (US);
Srikanth B. Samavedam, Austin, TX (US);
Suresh Venkatesan, Austin, TX (US);
John M. Grant, Austin, TX (US);
Srikanth B. Samavedam, Austin, TX (US);
Suresh Venkatesan, Austin, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A semiconductor device is formed. A first gate dielectric layer is formed over the semiconductor layer. A first conductive layer is formed over the first gate dielectric. A first separation layer is formed over the first conductive layer. A trench is formed in the semiconductor layer to separate the first mesa and the second mesa. The trench is filled with an isolation material to a height above a top surface of the first conductive layer. The first conductive layer is removed from the second mesa. A second conductive layer is formed over the first separation layer of the first mesa and over the second mesa. A planarizing etch removes the second conductive layer from over the first mesa. A first transistor of a first type is formed in the first mesa, and a second transistor of a second type is formed in the second mesa.