The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 11, 2011
Filed:
Dec. 13, 2010
Yutaka Yoshino, Isesaki, JP;
Takahiro Shirai, Isesaki, JP;
Shinji Kadono, Isesaki, JP;
Mineo Kawamoto, Kitakanbara-gun, JP;
Minoru Enomoto, Shinjuku-ku, JP;
Masakatsu Goto, Shinjuku-ku, JP;
Makoto Araki, Shinjuku-ku, JP;
Naoki Toda, Shinjuku-ku, JP;
Yutaka Yoshino, Isesaki, JP;
Takahiro Shirai, Isesaki, JP;
Shinji Kadono, Isesaki, JP;
Mineo Kawamoto, Kitakanbara-gun, JP;
Minoru Enomoto, Shinjuku-ku, JP;
Masakatsu Goto, Shinjuku-ku, JP;
Makoto Araki, Shinjuku-ku, JP;
Naoki Toda, Shinjuku-ku, JP;
CMK Corporation, Tokyo, JP;
Renesas Eastern Japan Semiconductor, Inc., Tokyo, JP;
Abstract
A printed wiring board includes a built-in semiconductor element. A protective film is formed on a semiconductor element-mounted surface of a base substrate to which the built-in semiconductor element is connected to protect the semiconductor element-mounted surface excepting a mounting pad. Upper and side surfaces of the built-in semiconductor element are covered with a first insulating film formed by filling a sealing material. The first insulating film is covered with a second insulating film formed of an insulating resin melted from an insulating layer that is provided in side and upper portions of the built-in semiconductor element.