The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 11, 2011
Filed:
Oct. 28, 2009
Kevin K. Chan, Yorktown Heights, NY (US);
Abhishek Dube, Hopewell Junction, NY (US);
Jinghong LI, Hopewell Junction, NY (US);
Viorel Ontalus, Hopewell Junction, NY (US);
Zhengmao Zhu, Hopewell Junction, NY (US);
Kevin K. Chan, Yorktown Heights, NY (US);
Abhishek Dube, Hopewell Junction, NY (US);
Jinghong Li, Hopewell Junction, NY (US);
Viorel Ontalus, Hopewell Junction, NY (US);
Zhengmao Zhu, Hopewell Junction, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A semiconductor structure including a bi-layer nFET embedded stressor element is disclosed. The bi-layer nFET embedded stressor element can be integrated into any CMOS process flow. The bi-layer nFET embedded stressor element includes an implant damaged free first layer of a first epitaxy semiconductor material having a lattice constant that is different from a lattice constant of a semiconductor substrate and imparts a tensile strain in a device channel of an nFET gate stack. Typically, and when the semiconductor is composed of silicon, the first layer of the bi-layer nFET embedded stressor element is composed of Si:C. The bi-layer nFET embedded stressor element further includes a second layer of a second epitaxy semiconductor material that has a lower resistance to dopant diffusion than the first epitaxy semiconductor material. Typically, and when the semiconductor is composed of silicon, the second layer of the bi-layer nFET embedded stressor element is composed of silicon. Only the second layer of the bi-layer nFET embedded stressor element includes the implanted source/drain regions.