The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 04, 2011

Filed:

Feb. 23, 2009
Applicants:

Kangguo Cheng, Guilderland, NY (US);

Naftali Eliahu Lustig, Croton on Hudson, NY (US);

Daewon Yang, Hopewell Junction, NY (US);

Inventors:

Kangguo Cheng, Guilderland, NY (US);

Naftali Eliahu Lustig, Croton on Hudson, NY (US);

Daewon Yang, Hopewell Junction, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/01 (2006.01); H01L 27/12 (2006.01); H01L 31/0392 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of forming a silicon-on-insulator (SOI) semiconductor structure in a substrate having a bulk semiconductor layer, a buried oxide (BOX) layer and an SOI layer. During the formation of a trench in the structure, the BOX layer is undercut. The method includes forming a dielectric material on the upper wall of the trench adjacent to the undercutting of the BOX layer and then etching the dielectric material to form a spacer. The spacer fixes the BOX layer undercut and protects it during subsequent steps of forming a bottle-shaped portion of the trench, forming a buried plate in the deep trench; and then forming a trench capacitor. There is also a semiconductor structure, preferably an SOI eDRAM structure, having a spacer which fixes the undercutting in the BOX layer.


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