The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 27, 2011
Filed:
Apr. 23, 2010
Shinn-sheng Yu, Hsinchu, TW;
Chih-ming KE, Hsin-Chu, TW;
Jacky Huang, Chu-Bei, TW;
Chun-kuang Chen, Hsin-Chu Hsien, TW;
Tsai-sheng Gau, Hsinchu, TW;
Shinn-Sheng Yu, Hsinchu, TW;
Chih-Ming Ke, Hsin-Chu, TW;
Jacky Huang, Chu-Bei, TW;
Chun-Kuang Chen, Hsin-Chu Hsien, TW;
Tsai-Sheng Gau, Hsinchu, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A system for improving substrate critical dimension uniformity is described. The system includes an exposing means for exposing a plurality of mask patterns on a first plurality of substrates at predetermined locations with common splits of focus ({F}) and exposure dose ({E}) for each of the first plurality of substrates to form a plurality of perturbed wafers. A measuring means is provided for measuring a critical dimension of the plurality of mask patterns at each of the predetermined locations for each of the plurality of perturbed wafers. An averaging means is provided for averaging the critical dimension measured at each of the predetermined locations over the plurality of perturbed wafers to form a perturbed critical dimension map. A second measuring means is provided for measuring a sidewall angle of the plurality of mask patterns at each of the predetermined locations for each of the plurality of perturbed wafers. A second averaging means is provided for averaging the sidewall angle measured at each of the predetermined locations over the plurality of perturbed wafers to form a perturbed sidewall angle map. The perturbed critical dimension map and the perturbed sidewall angle map can then be provided to an exposure tool.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile