The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 13, 2011

Filed:

Jun. 29, 2006
Applicants:

Yoichiro Kawamura, Gifu, JP;

Shigeki Sawa, Gifu, JP;

Katsuhiko Tanno, Gifu, JP;

Hironori Tanaka, Gifu, JP;

Naoaki Fujii, Gifu, JP;

Inventors:

Yoichiro Kawamura, Gifu, JP;

Shigeki Sawa, Gifu, JP;

Katsuhiko Tanno, Gifu, JP;

Hironori Tanaka, Gifu, JP;

Naoaki Fujii, Gifu, JP;

Assignee:

Ibiden Co., Ltd., Ogaki-shi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/16 (2006.01);
U.S. Cl.
CPC ...
Abstract

A printed wiring board includes a wiring substrate, one or more conductor circuits provided on the wiring substrate, a solder resist layer provided on a surface of the wiring substrate and having multiple openings, the openings exposing multiple parts of the conductor circuits forming multiple conductor pads for mounting electronic parts, and multiple solder bumps formed on the conductor pads, respectively. The conductor pads are aligned at a pitch of about 200 μm or less, and a ratio W/D of a diameter W of the solder bumps to an opening diameter D of the openings formed in the solder resist layer is about 1.05 to about 1.7.


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