The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 23, 2011
Filed:
Aug. 29, 2007
Tuung Luoh, Taipei, TW;
Chi-tung Huang, Hsinchu, TW;
Kuang-chao Chen, Hsinchu, TW;
Candy Jiang, Hsinchu, TW;
Tuung Luoh, Taipei, TW;
Chi-Tung Huang, Hsinchu, TW;
Kuang-Chao Chen, Hsinchu, TW;
Candy Jiang, Hsinchu, TW;
Abstract
A BEOL manufacturing process for forming a via process between two metal lines on a semiconductor wafer comprises depositing a portion of a first metal adhesion layer within a patterned via hole, followed by a cooling step. The cooling step is then followed by formation of the remainder of the first metal adhesion layer and formation of a second metal adhesion layer within the patterned via hole. This process of forming the remaining portion of the first metal adhesion layer can be referred to as a wafer load, unload, load (LUL) process. By using a LUL process, thermal history is minimized, which reduces Al extrusion at the via interfaces.