The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 16, 2011
Filed:
Apr. 23, 2008
Douglas Chang, San Jose, CA (US);
Neeraj Kaul, Fremont, CA (US);
Balkrishna Rashingkar, San Jose, CA (US);
Douglas Chang, San Jose, CA (US);
Neeraj Kaul, Fremont, CA (US);
Balkrishna Rashingkar, San Jose, CA (US);
Synopsys, Inc., Mountain View, CA (US);
Abstract
One embodiment of the present invention provides a system that computes a routability estimation across a collection of local routing regions associated with a circuit layout. This system first selects a first local routing region associated with a route overflow, wherein a respective local routing region is associated with an estimation of a number of route overflows for routing layers in a region of the circuit layout. Furthermore, a respective routing layer is associated with a preferred direction variable D. Next, the system transfers an overflow value k in direction d away from an overflowing routing layer for the first local routing region to a second local routing region, which has the capacity to handle an overflow of k or more routes in a direction d. Finally, the system computes a global routability estimation as a function of a global overflow cost and an adjacent overflow cost.