The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 16, 2011

Filed:

Apr. 11, 2008
Applicants:

Xiaoqing Wen, Kitakyushu, JP;

Kohei Miyase, Kitakyushu, JP;

Seiji Kajihara, Kitakyushu, JP;

Inventors:

Xiaoqing Wen, Kitakyushu, JP;

Kohei Miyase, Kitakyushu, JP;

Seiji Kajihara, Kitakyushu, JP;

Assignee:

Kyushu Institute of Technology, Kitakyushu-shi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A test pattern generation method for determining if a combinational portionis defective, by applying test patterns to a semiconductor integrated circuitand comparing responses to the test patterns with expected responses, the method including: a first step of generating test patterns having logic bits for detecting defects and unspecified bits; a second step of selecting critical pathsgenerated by the application of the test patterns; a third step of identifying critical gates on the critical paths; and a fourth step of determining unspecified bits so that a critical capture transition metric, which indicates the number of the critical gates whose states are changed, is reduced; wherein by reducing the critical capture transition metric, output delays from the critical pathsare prevented, and thereby false testing can be avoided.


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