The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 16, 2011

Filed:

Aug. 14, 2008
Applicants:

Dustin L. Winters, Webster, NY (US);

John W. Hamer, Rochester, NY (US);

Gary Parrett, Rochester, NY (US);

Christopher Bower, Raleigh, NC (US);

Etienne Menard, Durham, NC (US);

Inventors:

Dustin L. Winters, Webster, NY (US);

John W. Hamer, Rochester, NY (US);

Gary Parrett, Rochester, NY (US);

Christopher Bower, Raleigh, NC (US);

Etienne Menard, Durham, NC (US);

Assignees:

Global OLED Technology LLC, Herndon, VA (US);

Semprius, Inc., Durham, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05B 33/08 (2006.01); H01L 51/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An electroluminescent device having a plurality of current driven pixels arranged in rows and columns, such that when current is provided to a pixel it produces light, including each pixel having first and second electrodes and current responsive electroluminescent media disposed between the first and second electrodes; at least one chiplet having a thickness less than 20 micrometers; including transistor drive circuitry for controlling the operation of at least four pixels, the chiplet being mounted on a substrate and having connection pads; a planarization layer disposed over at least a portion of the chiplet; a first conductive layer over the planarization layer and connected to at least one of the connection pads; and a structure for providing electrical signals through the first conductive layer and at least one of the connection pads of the chiplet so that the transistor drive circuitry of the chiplet controls current to the four pixels.

Published as:
US2010039030A1; WO2010019185A1; TW201013924A; EP2324507A1; KR20110074844A; US7999454B2; CN102160181A; US2011279014A1; JP2011530832A; JP5367819B2; CN102160181B; TWI489624B; KR101576221B1; EP2324507B1;

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