The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 26, 2011
Filed:
Aug. 20, 2008
Ravi Nalla, Chandler, AZ (US);
Islam Salama, Chandler, AZ (US);
Charan Gurumurthy, Higley, AZ (US);
Hamid Azimi, Chandler, AZ (US);
Ravi Nalla, Chandler, AZ (US);
Islam Salama, Chandler, AZ (US);
Charan Gurumurthy, Higley, AZ (US);
Hamid Azimi, Chandler, AZ (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A method of forming collapse chip connection bumps on a semiconductor substrate is provided. The method includes providing a semiconductor substrate having a plurality of bump vias on a top surface of the semiconductor substrate and electroplating the plurality of bump vias to form a plurality of via pads on the top surface of the semiconductor substrate. The method also includes disposing a plurality of solder microballs on the top surface of the semiconductor substrate, wherein each solder microball is placed on a corresponding via pad on the semiconductor substrate and reflowing the plurality of solder microballs to form the collapse chip connection bumps on the semiconductor substrate.