The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 19, 2011

Filed:

Sep. 15, 2009
Applicants:

Rajit Manohar, Ithaca, NY (US);

Gael Paul, Aix-en-Provence, FR;

Marcel Van Der Goot, Pasadena, CA (US);

Raymond Nijssen, San Jose, CA (US);

Christopher Lafrieda, Brooklyn, NY (US);

Clinton W. Kelly, San Jose, CA (US);

Virantha Ekanayake, San Jose, CA (US);

Inventors:

Rajit Manohar, Ithaca, NY (US);

Gael Paul, Aix-en-Provence, FR;

Marcel Van der Goot, Pasadena, CA (US);

Raymond Nijssen, San Jose, CA (US);

Christopher LaFrieda, Brooklyn, NY (US);

Clinton W. Kelly, San Jose, CA (US);

Virantha Ekanayake, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A synchronous circuit design is converted to an asynchronous circuit by converting synchronous circuit logic to an asynchronous circuit logic, and converting one or more asynchronous inputs at a circuit boundary to an asynchronous input to the converted asynchronous circuit logic, such that the converted asynchronous input is operable to generate a token upon observing a change in state on the asynchronous input. One or more asynchronous outputs at a circuit boundary is converted to an asynchronous output from the converted asynchronous circuit logic, such that the converted asynchronous output is operable to output updated data as soon as changed data is received from the converted asynchronous circuit logic in the asynchronous output.


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