The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 2011

Filed:

Apr. 29, 2009
Applicants:

Hyun-soo Chung, Hwaseong-si, KR;

Jae-shin Cho, Yongin-si, KR;

Seong-deok Hwang, Seoul, KR;

Jum-gon Kim, Suwon-si, KR;

Ki-hyuk Kim, Yongin-si, KR;

Inventors:

Hyun-soo Chung, Hwaseong-si, KR;

Jae-shin Cho, Yongin-si, KR;

Seong-deok Hwang, Seoul, KR;

Jum-gon Kim, Suwon-si, KR;

Ki-hyuk Kim, Yongin-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor package with improved joint reliability and a method of fabricating the semiconductor package are disclosed. A conductive connector may be formed on a surface of a semiconductor wafer on which semiconductor devices may be arranged. A first insulating layer including a first opening through which a portion of the connection pad is exposed may be formed on the connection pad and the semiconductor wafer. A rewiring line electrically connected to an exposed portion of the connection pad may be formed on the first insulating layer. A second insulating layer including a second opening through which a portion of the rewiring line is exposed may be formed on the rewiring line and the first insulating layer. A connection terminal including one or more entangled wires may be formed on an exposed portion of the rewiring line so as to be electrically connected to the rewiring line.


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