The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 2011

Filed:

Jul. 27, 2009
Applicants:

Eun-ji Jung, Suwon-si, KR;

Sang-woo Lee, Seoul, KR;

Jeong-gil Lee, Goyang-si, KR;

Gil-heyun Choi, Seoul, KR;

Chang-won Lee, Gwacheon-si, KR;

Byung-hee Kim, Seoul, KR;

Jin-ho Park, Yongin-si, KR;

Inventors:

Eun-ji Jung, Suwon-si, KR;

Sang-woo Lee, Seoul, KR;

Jeong-gil Lee, Goyang-si, KR;

Gil-heyun Choi, Seoul, KR;

Chang-won Lee, Gwacheon-si, KR;

Byung-hee Kim, Seoul, KR;

Jin-ho Park, Yongin-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of fabricating a semiconductor device includes: forming a first polysilicon layer having a first thickness in a peripheral circuit region formed on a substrate; forming a stack structure comprising a first tunneling insulating layer, a charge trap layer, and a blocking insulating layer in a memory cell region formed on the substrate; forming a second polysilicon layer having a second thickness that is less than the first thickness on the blocking insulating layer; and forming gate electrodes by siliciding the first and second polysilicon layers.


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