The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 2011

Filed:

May. 22, 2008
Applicants:

Youval Nehmadi, Modiin, IL;

Rinat Shimshi, San Jose, CA (US);

Vicky Svidenko, San Jose, CA (US);

Alexander T. Schwarm, Austin, TX (US);

Sundar Jawaharlal, Glen Allen, VA (US);

Inventors:

Youval Nehmadi, Modiin, IL;

Rinat Shimshi, San Jose, CA (US);

Vicky Svidenko, San Jose, CA (US);

Alexander T. Schwarm, Austin, TX (US);

Sundar Jawaharlal, Glen Allen, VA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 19/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

In one embodiment, a method for predicting yield during the design stage includes receiving defectivity data identifying defects associated with previous wafer designs, and dividing the defects into systematic defects and random defects. For each design layout of a new wafer design, yield is predicted separately for the systematic defects and the random defects. A combined yield is then calculated based on the yield predicted for the systematic defects and the yield predicted for the random defects.


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