The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 24, 2011

Filed:

Jun. 01, 2007
Applicants:

Victor Moroz, Saratoga, CA (US);

Dipankar Pramanik, Saratoga, CA (US);

Kishore Singhal, Milpitas, CA (US);

Xi-wei Lin, Fremont, CA (US);

Inventors:

Victor Moroz, Saratoga, CA (US);

Dipankar Pramanik, Saratoga, CA (US);

Kishore Singhal, Milpitas, CA (US);

Xi-Wei Lin, Fremont, CA (US);

Assignee:

Synopsys, Inc., Mountain View, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/455 (2006.01); G06F 17/50 (2006.01); G06F 11/22 (2006.01);
U.S. Cl.
CPC ...
Abstract

An automated method for compensating for process-induced variations in threshold voltage and drive current in a MOSFET integrated circuit. The method's first step is selecting a transistor for analysis from the array. The method loops among the transistors of the array as desired. Next the design of the selected transistor is analyzed, including the steps of determining threshold voltage variations induced by layout neighborhood; determining drive current variations induced by layout neighborhood. The method then proceeds by attempting to compensate for any determined variations by varying the length of the transistor gate. The method can further include the step of identifying any shortcoming in compensation by varying contact spacing.


Find Patent Forward Citations

Loading…