The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 10, 2011
Filed:
May. 14, 2009
Wagdi W. Abadeer, Essex Junction, VT (US);
Lillian Kamal, Legal Representative, Saratoga, CA (US);
Kiran V. Chatty, Essex Junction, VT (US);
Robert J. Gauthier, Jr., Essex Junction, VT (US);
Jed H. Rankin, Essex Junction, VT (US);
Yun Shi, Essex Junction, VT (US);
William R. Tonti, Essex Junction, VT (US);
Wagdi W. Abadeer, Essex Junction, VT (US);
Lillian Kamal, legal representative, Saratoga, CA (US);
Kiran V. Chatty, Essex Junction, VT (US);
Robert J. Gauthier, Jr., Essex Junction, VT (US);
Jed H. Rankin, Essex Junction, VT (US);
Yun Shi, Essex Junction, VT (US);
William R. Tonti, Essex Junction, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
Structures and methods for integrating a thick oxide high-voltage metal-oxide-semiconductor (MOS) device into a thin oxide silicon-on-insulator (SOI). A method of forming a semiconductor structure includes forming first source and drain regions of a first device below a buried oxide layer of a silicon-on-insulator (SOI) wafer, forming a gate of the first device in a layer of semiconductor material above the buried oxide layer; and forming second source and drain regions of a second device in the layer of semiconductor material above the buried oxide layer.