The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 29, 2011

Filed:

Feb. 13, 2009
Applicants:

Wai Lo, Palo Alto, CA (US);

Christie Marrian, San Jose, CA (US);

Tzu-ning Fang, San Jose, CA (US);

Sameer Haddad, San Jose, CA (US);

Inventors:

Wai Lo, Palo Alto, CA (US);

Christie Marrian, San Jose, CA (US);

Tzu-Ning Fang, San Jose, CA (US);

Sameer Haddad, San Jose, CA (US);

Assignee:

Spansion LLC, Sunnyvale, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/36 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory architecture that employs one or more semiconductor PIN diodes is provided. The memory employs a substrate that includes a buried bit/word line and a PIN diode. The PIN diode includes a non-intrinsic semiconductor region, a portion of the bit/word line, and an intrinsic semiconductor region positioned between the non-intrinsic region and the portion of the bit/word line.


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