The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 22, 2011

Filed:

May. 23, 2007
Applicants:

Te-hung Wu, Tainan County, TW;

Chia-wei Huang, Kao-Hsiung, TW;

Chuen Huei Yang, Taipei, TW;

Sheng-yuan Huang, Yun-Lin County, TW;

Pei-ru Tsai, Tainan County, TW;

Chih-hao Wu, Taipei, TW;

Inventors:

Te-Hung Wu, Tainan County, TW;

Chia-Wei Huang, Kao-Hsiung, TW;

Chuen Huei Yang, Taipei, TW;

Sheng-Yuan Huang, Yun-Lin County, TW;

Pei-Ru Tsai, Tainan County, TW;

Chih-Hao Wu, Taipei, TW;

Assignee:

United Microelectronics Corp., Science-Based Industrial Park, Hsin-Chu, TW;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of verifying a layout pattern comprises separately steps of obtaining a simulated pattern at a lower portion of a film by using a layout pattern as a mask to transfer the layout pattern to the film, and obtaining a simulated pattern at an upper portion of the film by using the layout pattern as a mask to transfer the layout pattern to the film. The layout pattern is verified according to the upper and lower simulated patterns.


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