The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 15, 2011

Filed:

Mar. 10, 2008
Applicants:

Ralf Richter, Dresden, DE;

Andy Wei, Dresden, DE;

Manfred Horstmann, Duerrroehrsdorf-Dittersbach, DE;

Joerg Hohage, Dresden, DE;

Inventors:

Ralf Richter, Dresden, DE;

Andy Wei, Dresden, DE;

Manfred Horstmann, Duerrroehrsdorf-Dittersbach, DE;

Joerg Hohage, Dresden, DE;

Assignee:

Advanced Micro Devices, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01); H01L 21/311 (2006.01); H01L 21/70 (2006.01); H01L 27/085 (2006.01);
U.S. Cl.
CPC ...
Abstract

By forming a stressed dielectric layer on different transistors and subsequently relaxing a portion thereof, the overall process efficiency in an approach for creating strain in channel regions of transistors by stressed overlayers may be enhanced while nevertheless transistor performance gain may be obtained for each type of transistor, since a highly stressed material positioned above the previously relaxed portion may also efficiently affect the underlying transistor.


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