The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 08, 2011
Filed:
Dec. 16, 2009
Volkan H. Ozguz, Aliso Veijo, CA (US);
Randolph S. Carlson, Carson City, NV (US);
Keith D. Gann, Tustin, CA (US);
John Leon, Anaheim, CA (US);
W. Eric Boyd, San Clemete, CA (US);
Volkan H. Ozguz, Aliso Veijo, CA (US);
Randolph S. Carlson, Carson City, NV (US);
Keith D. Gann, Tustin, CA (US);
John Leon, Anaheim, CA (US);
W. Eric Boyd, San Clemete, CA (US);
Aprolase Development Co., LLC, Wilmington, DE (US);
Abstract
A field programmable gate array, an access lead network coupled to the FPGA, and a plurality of memories electrically coupled to the access lead network. The FPGA, access lead network, and plurality of memories are arranged and configured to operate with a variable word width, namely with a word width between 1 and a maximum number of bits. The absolute maximum word width may be as large as m*N where m is the number of word width bits per memory chip and N is the number of memory chips.