The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 22, 2011

Filed:

Mar. 28, 2005
Applicants:

Vigyan Singhal, Fremont, CA (US);

Soe Myint, Santa Clara, CA (US);

Chung-wah Norris Ip, Fremont, CA (US);

Howard Wong-toi, Albany, CA (US);

Inventors:

Vigyan Singhal, Fremont, CA (US);

Soe Myint, Santa Clara, CA (US);

Chung-Wah Norris Ip, Fremont, CA (US);

Howard Wong-Toi, Albany, CA (US);

Assignee:

Jasper Design Automation, Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

In the field of functional verification of digital designs in systems that use an abstraction for portions of a circuit design to perform the verification proof, a tool is described for resolving inconsistencies between the design and abstractions for the design. The tool provides information to a user about intermediate steps in the verification process. In response, the user may provide insight about the design to allow the tool to adjust the verification analysis of the design. The information provided to the user, including possible conflicts between the design and its abstractions, may include visualization techniques to facilitate the user's understating of any inconsistencies.


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