The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 22, 2011

Filed:

Aug. 06, 2008
Applicants:

Merritt Funk, Austin, TX (US);

Radha Sundararajan, Dripping Springs, TX (US);

Asao Yamashita, Fishkill, NY (US);

Daniel Prager, Hopewell Junction, NY (US);

Hyung Joo Lee, Austin, TX (US);

Inventors:

Merritt Funk, Austin, TX (US);

Radha Sundararajan, Dripping Springs, TX (US);

Asao Yamashita, Fishkill, NY (US);

Daniel Prager, Hopewell Junction, NY (US);

Hyung Joo Lee, Austin, TX (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 19/00 (2006.01); G06F 17/50 (2006.01); G06F 7/60 (2006.01); G06F 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The invention provides a method of processing a wafer using multilayer processing sequences and Multi-Layer/Multi-Input/Multi-Output (MLMIMO) models and libraries that can include one or more measurement procedures, one or more Poly-Etch (P-E) sequences, and one or more metal-gate etch sequences. The MLMIMO process control uses dynamically interacting behavioral modeling between multiple layers and/or multiple process steps. The multiple layers and/or the multiple process steps can be associated with the creation of lines, trenches, vias, spacers, contacts, and gate structures that can be created using isotropic and/or anisotropic etch processes.


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