The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 22, 2011
Filed:
Nov. 28, 2006
Yutaka Yoshino, Isesaki, JP;
Takahiro Shirai, Isesaki, JP;
Shinji Kadono, Isesaki, JP;
Mineo Kawamoto, Kitakanbara-gun, JP;
Minoru Enomoto, Shinjuku-ku, JP;
Masakatsu Goto, Shinjuku-ku, JP;
Makoto Araki, Shinjuku-ku, JP;
Naoki Toda, Shinjuku-ku, JP;
Yutaka Yoshino, Isesaki, JP;
Takahiro Shirai, Isesaki, JP;
Shinji Kadono, Isesaki, JP;
Mineo Kawamoto, Kitakanbara-gun, JP;
Minoru Enomoto, Shinjuku-ku, JP;
Masakatsu Goto, Shinjuku-ku, JP;
Makoto Araki, Shinjuku-ku, JP;
Naoki Toda, Shinjuku-ku, JP;
CMK Corporation, Tokyo, JP;
Renesas Eastern Japan Semiconductor, Inc., Tokyo, JP;
Abstract
The present invention provides a printed wiring board with a built-in semiconductor element in which an insufficient or excessive amount of filled sealing material does not affect excellent adhesion of the printed wiring board to an overlying wiring board. The printed wiring board with a built-in semiconductor element comprises a built-in semiconductor element, in which at least the lower surface, the upper surface, or the side surface of the semiconductor element is covered with an insulating film, and an insulating layer is provided in the side and upper portions of the semiconductor element. There is also provided a process for producing a printed wiring board with a built-in semiconductor element, comprising the steps of mounting a semiconductor element on a base substrate and covering at least the lower surface, the upper surface, or the side surface of the semiconductor element with an insulating film, disposing and stacking a semicured insulating sheet in the side portion of the semiconductor element, and disposing and stacking a semicured insulating sheet in the upper portion of the semiconductor element.