The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 22, 2011

Filed:

Apr. 07, 2008
Applicants:

Huang Liu, Singapore, SG;

Wei LU, Singapore, SG;

Hai Cong, Singapore, SG;

Alex K. H. See, Singapore, SG;

Hui Peng Koh, Singapore, SG;

Meisheng Zhou, Singapore, SG;

Inventors:

Huang Liu, Singapore, SG;

Wei Lu, Singapore, SG;

Hai Cong, Singapore, SG;

Alex K. H. See, Singapore, SG;

Hui Peng Koh, Singapore, SG;

Meisheng Zhou, Singapore, SG;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/84 (2006.01); H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit system that includes: providing a substrate including a first device and a second device; configuring the first device and the second device to include a first spacer, a first liner made from a first dielectric layer, and a second spacer made from a sacrificial spacer material; forming a second dielectric layer over the integrated circuit system; forming a first device source/drain and a second device source/drain adjacent the second spacer and through the second dielectric layer; removing the second spacer without damaging the substrate; forming a third dielectric layer over the integrated circuit system before annealing; and forming a fourth dielectric layer over the integrated circuit system that promotes stress within the channel of the first device, the second device, or a combination thereof.


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