The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 01, 2011

Filed:

Feb. 13, 2006
Applicants:

Steffen Rochel, Burlingame, CA (US);

David Overhauser, Cupertino, CA (US);

Gregory Steele, San Jose, CA (US);

Kung Hsu, Palo Alto, CA (US);

Inventors:

Steffen Rochel, Burlingame, CA (US);

David Overhauser, Cupertino, CA (US);

Gregory Steele, San Jose, CA (US);

Kung Hsu, Palo Alto, CA (US);

Assignee:

Cadence Design Systems, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

Disclosed are systems and methods for electrical verification of integrated circuits. Methodologies are described for verification of the power and ground distribution systems (PDS) for system-on-a-chip (SoC) and the verification of the interaction of the PDS with the behavior of integrated circuits.


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