The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 01, 2011

Filed:

Jun. 25, 2007
Applicants:

Timothy N. Ayres, Milpitas, CA (US);

Peter Wohl, Williston, VT (US);

John A. Waicukauski, Tualatin, OR (US);

Inventors:

Timothy N. Ayres, Milpitas, CA (US);

Peter Wohl, Williston, VT (US);

John A. Waicukauski, Tualatin, OR (US);

Assignee:

Synopsys, Inc., Mountain View, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/3177 (2006.01); G01R 31/40 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method to perform launch-on-shift scanning for integrated circuits having multiple clock domains is presented. An integrated circuit includes both capture clock domains and non-capture clock domains. The portions of the test vectors for non-capture clock domains are shifted into the scan chains of the non-capture clock domains and allowed to settle prior to the last shift launch cycle and the capture cycle of the capture clock domains. Thus, the ambiguity of the timing between the non-capture domains and the capture domains caused by asynchronous clock signals is eliminated.


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