The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 04, 2011
Filed:
Dec. 23, 2009
Takashi Suzuki, Yokohama, JP;
Hirokazu Ishida, Yokohama, JP;
Ichiro Mizushima, Yokohama, JP;
Yoshio Ozawa, Yokohama, JP;
Fumiki Aiso, Yokohama, JP;
Katsuyuki Sekine, Yokohama, JP;
Takashi Nakao, Yokohama, JP;
Yoshihiko Saito, Yokosuka, JP;
Takashi Suzuki, Yokohama, JP;
Hirokazu Ishida, Yokohama, JP;
Ichiro Mizushima, Yokohama, JP;
Yoshio Ozawa, Yokohama, JP;
Fumiki Aiso, Yokohama, JP;
Katsuyuki Sekine, Yokohama, JP;
Takashi Nakao, Yokohama, JP;
Yoshihiko Saito, Yokosuka, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
A method of manufacturing a semiconductor storage device includes providing an opening portion in a plurality of positions in an insulating film formed on a silicon substrate, and thereafter forming an amorphous silicon film on the insulating film, in which the opening portions are formed, and in the opening portions. Then, trenches are formed to divide the amorphous silicon film, in the vicinity of a midpoint between adjacent opening portions, into a portion on one opening portion side and a portion on the other opening portion side. Next, the amorphous silicon film, in which the trenches are formed, is annealed and subjected to solid-phase crystallization to form a single crystal with the opening portions used as seeds, and thereby a silicon single-crystal layer is formed. Then, a memory cell array is formed on the silicon single-crystal layer.