The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 28, 2010
Filed:
Sep. 28, 2007
LI Ding, Sunnyvale, CA (US);
Peivand Tehrani, Camarillo, CA (US);
Jindrich Zejda, Sunnyvale, CA (US);
Alireza Kasnavi, Sunnyvale, CA (US);
Li Ding, Sunnyvale, CA (US);
Peivand Tehrani, Camarillo, CA (US);
Jindrich Zejda, Sunnyvale, CA (US);
Alireza Kasnavi, Sunnyvale, CA (US);
Synopsys, Inc., Mountain View, CA (US);
Abstract
A method to perform timing analysis for a complex logic cell with distorted input waveform and coupled load networks is presented. Timing arc based models are used in conjunction with CCB based current models of portions of the logic cell to compute the output signal of the logic cell. For example, an intermediary signal is generated using a first timing arc based model and an equivalent coupled network output signal is generated using a channel connected block (CCB) based current model.