The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 14, 2010
Filed:
Mar. 21, 2006
Satoshi Nakamura, Yokohama, JP;
Takashi Suga, Yokohama, JP;
Mitsuaki Katagiri, Nishitokyo, JP;
Yukitoshi Hirose, Chigasaki, JP;
Satoshi Nakamura, Yokohama, JP;
Takashi Suga, Yokohama, JP;
Mitsuaki Katagiri, Nishitokyo, JP;
Yukitoshi Hirose, Chigasaki, JP;
Hitachi, Ltd., Tokyo, JP;
Elpida Memory, Inc., Tokyo, JP;
Abstract
Disclosed is a multichip package or system-in package which the logic chip includes a selector circuit which, by transmitting a test mode select signal or a test mode select command to the logic chip, enables access from a logic signal pin connected to the logic chip, to a memory control signal to each of the 'm' number of memory chips; and the memory control signal, when viewed from the logic chip, is connected using a one-for-one wiring scheme or a one-for-up-to-m branch wiring scheme, between the selector circuit and each of the 'm' number of memory chips. This multichip package or system-in package is low in noise and high in operational reliability.