The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 07, 2010
Filed:
Apr. 23, 2008
Harry Barowski, Boeblingen, DE;
J. Adam Butts, Hartsdale, NY (US);
Tobias Gemmeke, Stutensee, DE;
Nicolas Maeding, Holzgerlingen, DE;
Viresh Paruthi, Austin, TX (US);
Harry Barowski, Boeblingen, DE;
J. Adam Butts, Hartsdale, NY (US);
Tobias Gemmeke, Stutensee, DE;
Nicolas Maeding, Holzgerlingen, DE;
Viresh Paruthi, Austin, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
The present invention provides a fully automatic method for obtaining a circuit having minimized power consumption due to clock-gating. A circuit design to be optimized is modified to a reduced power modified design and associated with a clock gating scheme. Verification tools compare the modified design with the original design to a predetermined trigger-events to determine if the modified design can be used. Further modifications may be made iteratively until an optimal design is achieved.