The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 23, 2010

Filed:

Jul. 25, 2005
Applicants:

Toshiharu Furukawa, Essex Junction, VT (US);

Mark C. Hakey, Fairfax, VT (US);

Steven J. Holmes, Guilderland, NY (US);

David V. Horak, Essex Junction, VT (US);

Charles W. Koburger, Iii, Delmar, NY (US);

Mark E. Masters, Essex Junction, VT (US);

Inventors:

Toshiharu Furukawa, Essex Junction, VT (US);

Mark C. Hakey, Fairfax, VT (US);

Steven J. Holmes, Guilderland, NY (US);

David V. Horak, Essex Junction, VT (US);

Charles W. Koburger, III, Delmar, NY (US);

Mark E. Masters, Essex Junction, VT (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/70 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor structure in which a planar semiconductor device and a horizontal carbon nanotube transistor have a shared gate and a method of fabricating the same are provided in the present application. The hybrid semiconductor structure includes at least one horizontal carbon nanotube transistor and at least one planar semiconductor device, in which the at least one horizontal carbon nanotube transistor and the at least one planar semiconductor device have a shared gate and the at least one horizontal carbon nanotube transistor is located above a gate of the at least one planar semiconductor device.


Find Patent Forward Citations

Loading…