The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 26, 2010

Filed:

Nov. 28, 2007
Applicants:

Tae-joo Hwang, Gyeonggi-do, KR;

Eun-chul Ahn, Gyeonggi-do, KR;

Tae-gyeong Chung, Gyeonggi-do, KR;

Inventors:

Tae-Joo Hwang, Gyeonggi-do, KR;

Eun-Chul Ahn, Gyeonggi-do, KR;

Tae-Gyeong Chung, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A flip-chip assembly comprises a semiconductor chip, a substrate, a first buffer layer, a second buffer layer and a conductive bump. The semiconductor chip includes a first region and a second region adjacent to the first region. The substrate is disposed under the semiconductor chip. The first buffer layer is disposed between the first region of the semiconductor chip and the substrate. The second buffer layer is disposed between the second region of the semiconductor chip and the substrate. The conductive bump is formed through the second buffer layer and electrically connects the semiconductor chip to the substrate.


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Hwang, Tae-Joo. (2010). Flip-chip assembly and method of manufacturing the same (U.S. Patent No. 7821139). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7821139

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