The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 26, 2010

Filed:

Mar. 21, 2008
Applicants:

Ching-chung Ko, Hsinchu County, TW;

Tao Cheng, Hsinchu, TW;

Tien-yueh Liu, Hsinchu, TW;

Dar-shii Chou, Taipei Hsien, TW;

Peng-cheng Kao, Hsinchu, TW;

Inventors:

Ching-Chung Ko, Hsinchu County, TW;

Tao Cheng, Hsinchu, TW;

Tien-Yueh Liu, Hsinchu, TW;

Dar-Shii Chou, Taipei Hsien, TW;

Peng-Cheng Kao, Hsinchu, TW;

Assignee:

Mediatek Inc., Science-Based Industrial Park, Hsin-Chu, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit chip with reduced IR drop and improved chip performance is disclosed. The integrated circuit chip includes a semiconductor substrate having thereon a plurality of inter-metal dielectric (IMD) layers and a plurality of copper metal layers embedded in respective the plurality of IMD layers; a first passivation layer overlying the plurality of IMD layers and the plurality of copper metal layers; a first power/ground ring of a circuit block of the integrated circuit chip formed in a topmost layer of the plurality of copper metal layers; a second power/ground ring of the circuit block of the integrated circuit chip formed in an aluminum layer over the first passivation layer; and a second passivation layer covering the second power/ground ring and the first passivation layer.


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