The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 05, 2010

Filed:

Dec. 15, 2005
Applicants:

Ali-reza Adl-tabatabai, Santa Clara, CA (US);

Bratin Saha, San Jose, CA (US);

Richard L. Hudson, Florence, MA (US);

Haitham Akkary, Portland, OR (US);

Ravi Rajwar, Portland, OR (US);

Inventors:

Ali-Reza Adl-tabatabai, Santa Clara, CA (US);

Bratin Saha, San Jose, CA (US);

Richard L. Hudson, Florence, MA (US);

Haitham Akkary, Portland, OR (US);

Ravi Rajwar, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/12 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided is a method, system, and program for coordinating access to memory locations for hardware transactional memory transactions and software transactional memory transactions. A hardware transaction executing in hardware transactional memory initiates a request to access a memory location. A fault is returned to the hardware transaction request in response to an operation by one software transaction executing in a software transactional memory.


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