The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 05, 2010
Filed:
May. 16, 2006
Nhat D. Vo, Austin, TX (US);
Tu-anh N. Tran, Austin, TX (US);
Burton J. Carpenter, Austin, TX (US);
Dae Y. Hong, Austin, TX (US);
James W. Miller, Austin, TX (US);
Kendall D. Phillips, Driftwood, TX (US);
Nhat D. Vo, Austin, TX (US);
Tu-Anh N. Tran, Austin, TX (US);
Burton J. Carpenter, Austin, TX (US);
Dae Y. Hong, Austin, TX (US);
James W. Miller, Austin, TX (US);
Kendall D. Phillips, Driftwood, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A pad () is electrically connected to a first I/O cell () while also physically overlying active circuitry of a second I/O cell (). Note that although the pad () overlies the second I/O cell (), the pad () is not electrically connected to the I/O cell (). Such a pattern may be replicated in any desired manner so that the I/O cells (e.g.-) may have a finer pitch than the corresponding pads (-and-). In addition, the size of the pads may be increased (e.g. padmay be bigger than pad) while the width 'c' of the I/O cells (-) does not have to be increased. Such a pattern (e.g.) may be arranged so that the area required in one or more dimensions may be minimized.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile