The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 05, 2010
Filed:
Apr. 12, 2007
Zvonimir Gabric, Zorneding, DE;
Werner Pamler, Munich, DE;
Guenther Schindler, Munich, DE;
Gernot Steinlesberger, Munich, DE;
Andreas Stich, Gruenwald, DE;
Martin Traving, Unterhaching, DE;
Eugen Unger, Augsburg, DE;
Zvonimir Gabric, Zorneding, DE;
Werner Pamler, Munich, DE;
Guenther Schindler, Munich, DE;
Gernot Steinlesberger, Munich, DE;
Andreas Stich, Gruenwald, DE;
Martin Traving, Unterhaching, DE;
Eugen Unger, Augsburg, DE;
Infineon Technologies AG, Munich, DE;
Abstract
In a method for manufacturing a layer arrangement, a plurality of electrically conductive structures are embedded in a substrate. Material of the substrate is removed at least between adjacent electrically conductive structures. An interlayer is formed on at least one portion of sidewalls of each of the electrically conductive structures. A first layer is formed on the interlayer where an upper partial region of the interlayer remaining free of a covering with the first layer. An electrically insulating second layer is formed selectively on that partial region of the interlayer which is free of the first layer, in such a way that the electrically insulating second layer bridges adjacent electrically conductive structures such that air gaps are formed between adjacent electrically conductive structures.