The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 28, 2010

Filed:

Jan. 12, 2007
Applicants:

Shenging Fang, Fremont, CA (US);

Kuo-tung Chang, Saratoga, CA (US);

Tim Thurgate, Sunnyvale, CA (US);

Youseok Suh, Cupertino, CA (US);

Allison Holbrook, San Jose, CA (US);

Inventors:

Shenging Fang, Fremont, CA (US);

Kuo-Tung Chang, Saratoga, CA (US);

Tim Thurgate, Sunnyvale, CA (US);

YouSeok Suh, Cupertino, CA (US);

Allison Holbrook, San Jose, CA (US);

Assignee:

Spansion LLC, Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for fabricating a memory device with a self-aligned trap layer which is optimized for scaling is disclosed. In the present invention, a non-conformal oxide is deposited over the charge trapping layer to form a thick oxide on top of the core source/drain region and a pinch off and a void at the top of the STI trench. An etch is performed on the pinch-off oxide and the thin oxide on the trapping layer on the STI oxide. The trapping layer is then partially etched between the core cells. A dip-off of the oxide on the trapping layer is performed. And a top oxide is formed. The top oxide converts the remaining trap layer to oxide and thus isolate the trap layer.


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