The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 21, 2010
Filed:
Jul. 31, 2007
Ravindranath Droopad, Chandler, AZ (US);
Matthias Passlack, Chandler, AZ (US);
Karthik Rajagopalan, Chandler, AZ (US);
Ravindranath Droopad, Chandler, AZ (US);
Matthias Passlack, Chandler, AZ (US);
Karthik Rajagopalan, Chandler, AZ (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A method of forming a semiconductor structure includes forming a channel layer; forming a superlattice barrier layer overlying the channel layer, and forming a gate dielectric overlying the superlattice barrier layer. The superlattice barrier layer includes alternating first and second layers of barrier material. In addition, the superlattice barrier layer is configured for increasing a transconductance of the semiconductor device by at least a factor of three over a semiconductor device absent such superlattice barrier layer.