Semiconductor memory preventing an electric short circuit between a word line and a semiconductor substrate, and manufacturing method for the semiconductor memory

Abstract

A semiconductor device comprises a non-volatile memory including a memory cell array, element isolating regions, a second trench and a word line. The memory cell array is constituted by memory cells which have floating electrodes and are arranged in the shape of a matrix on a semiconductor substrate. Each of the element isolating regions has a first trench formed in the semiconductor substrate and between memory cells adjacent to each other along a gate width direction, and an isolating filler filled in the first trench. The second trench is formed in the isolating filler and between the floating electrodes of the memory cells adjacent to each other along the gate width direction, and is narrow at the bottom thereof. The word line is connected to the memory cells, buried in the second trenches and extending along the gate width direction.