The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 07, 2010

Filed:

Nov. 21, 2006
Applicants:

Ajay K. Sharma, Beaverton, OR (US);

Sean King, Beaverton, OR (US);

Dennis Hanken, Beaverton, OR (US);

Andrew W. Ott, Hillsboro, OR (US);

Inventors:

Ajay K. Sharma, Beaverton, OR (US);

Sean King, Beaverton, OR (US);

Dennis Hanken, Beaverton, OR (US);

Andrew W. Ott, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/31 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods and apparatuses to selectively deposit a dielectric on a self-assembled monolayer ('SAM') adsorbed metal are described. A wafer includes a device having a first electrode. A first self-assembled monolayer is deposited on the wafer covering the first electrode. Next, a portion of the first self-assembled monolayer is removed to expose the first electrode. The first self-assembled monolayer includes a hydrophobic layer. Further, second self-assembled monolayer is deposited on the first electrode. The second self-assembled monolayer includes a hydrophilic layer. Next, an insulating layer is deposited on the second self-assembled monolayer. Further, self-aligned contacts to one or more second electrodes of the device are formed.


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