The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 31, 2010

Filed:

Apr. 22, 2009
Applicants:

Morgan T. Johnson, Portland, OR (US);

Lawrence H. Walls, Portland, OR (US);

Raymond J. Werner, Portland, OR (US);

Inventors:

Morgan T. Johnson, Portland, OR (US);

Lawrence H. Walls, Portland, OR (US);

Raymond J. Werner, Portland, OR (US);

Assignee:

Advanced Inquiry Systems, Inc., Hillsboro, OR (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

Collecting process characterization data local to a failed integrated circuit (IC), includes providing a wafer having ICs, each IC having contact terminals, the wafer having process characterization test sites distributed across it such that at least one process characterization test site is adjacent each IC; selecting two or more ICs for simultaneous testing; for each of those ICs, coupling two or more contact terminals of the selected IC, and a corresponding two or more contact terminals of an associated test site to corresponding input terminals of a multiplexer, each multiplexer having an output terminal and a select control input terminal, the multiplexer operable to selectively provide an electrical pathway between either an IC contact terminal or a test site contact terminal and the multiplexer output terminal; coupling the output terminal of each multiplexer to a tester channel; operating the multiplexer so that its output terminal is coupled to the IC contact terminal; simultaneously testing two or more ICs; detecting a failure of at least one of the selected ICs prior to completion of testing the remaining ICs simultaneously being tested; subsequent to detecting the failure, operating the multiplexer so that its output terminal is coupled to the test site contact terminal; and collecting process characterization data prior to completion of testing the remaining ICs.


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