The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 31, 2010

Filed:

Mar. 04, 2008
Applicants:

Un Byoung Kang, Hwaseong-si, KR;

Yong Hwan Kwon, Suwon-si, KR;

Chung Sun Lee, Sungnam-si, KR;

Woon Seong Kwon, Suwon-si, KR;

Hyung Sun Jang, Suwon-si, KR;

Inventors:

Un Byoung Kang, Hwaseong-si, KR;

Yong Hwan Kwon, Suwon-si, KR;

Chung Sun Lee, Sungnam-si, KR;

Woon Seong Kwon, Suwon-si, KR;

Hyung Sun Jang, Suwon-si, KR;

Assignee:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of manufacturing a semiconductor device includes forming a diffusion barrier layer on a substrate, and forming at least two features on the substrate such that the diffusion barrier layer is respectively disposed between each feature and the substrate and contacts the at least two features. A first impurity region of the substrate contains impurities of a first type, a second impurity region of the substrate contains impurities of a second type, different from the first type, a first feature of the at least two features is in the first impurity region, and a second feature of the at least two features is in the second impurity region, such that the second feature is electrically isolated from first feature by the different impurity regions.


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