The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7786568 B1

PDF
Full Text
Expired
Date of Patent:
Aug. 31, 2010

Filed:

Sep. 30, 2008
Applicant:

Chin-ti Chen, Hsinchu, TW;

Inventor:

Chin-Ti Chen, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/04 (2006.01); H01L 23/48 (2006.01);
U.S. Cl.
CPC ...
Abstract

A WBGA semiconductor package primarily comprises a substrate, a chip, a chip-bonding adhesive, a plurality of bonding wires electrically connecting the chip and the substrate, an encapsulant to encapsulate the chip and the bonding wires, and a plurality of external terminals disposed under the substrate. The substrate has a depression for accommodating the chip-bonding adhesive and a slot for passing through bonding wires. The chip is partially embedded in the depression to dispose on the substrate. During the chip bonding step, the chip-bonding adhesive is confined in the depression in a manner to fill the gaps between the sides of the first chip and the inwalls around the depression to generate a non-planar adhering interface by partially covering the sides of the first chip. Therefore, the total package thickness is reduced, the delamination of the passivation layer and the fractures at the sides of the chip are avoided.


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Chen, Chin-Ti. (2010). Window bga semiconductor package (U.S. Patent No. 7786568). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7786568

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