The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 31, 2010
Filed:
Dec. 12, 2008
Applicants:
Byung Tai DO, Singapore, SG;
Seng Guan Chow, Singapore, SG;
Seung Uk Yoon, Singapore, SG;
Inventors:
Assignee:
Stats Chippac Ltd., Singapore, SG;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 23/04 (2006.01);
U.S. Cl.
CPC ...
Abstract
A method of manufacture of an integrated circuit packaging system includes: providing a silicon substrate having a circuitry layer; creating a partial via through the circuitry layer; filling the partial via with a plug having a bottom surface; creating a recess that is angled outward and exposes the bottom surface of the plug; and coating the recess with a recess-insulation-layer while leaving the bottom surface of the plug exposed.
Do, Byung. (2010). Integrated circuit packaging system having through silicon vias with partial depth metal fill regions and method of manufacture thereof (U.S. Patent No. 7786008). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7786008
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile