The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 31, 2010
Filed:
Apr. 07, 2008
Mark Hoinkis, Fishkill, NY (US);
Matthias Hierlemann, Munich, DE;
Gerald Friese, Munich, DE;
Andy Cowley, Wappingers Falls, NY (US);
Dennis J. Warner, Mechanicsville, VA (US);
Erdem Kaltalioglu, Wappingers Falls, NY (US);
Mark Hoinkis, Fishkill, NY (US);
Matthias Hierlemann, Munich, DE;
Gerald Friese, Munich, DE;
Andy Cowley, Wappingers Falls, NY (US);
Dennis J. Warner, Mechanicsville, VA (US);
Erdem Kaltalioglu, Wappingers Falls, NY (US);
Infineon Technologies AG, Munich, DE;
Abstract
A method, apparatus and system are provided for relieving stress in the via structures of semiconductor structures whenever a linewidth below a via is larger than a ground-rule, including providing a via at least as large as the groundrule, providing a landing pad above the via, providing a via bar in place of a via, slotting the metal linewidth below the via, or providing an oversize via with a sidewall spacer.