The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 31, 2010
Filed:
Mar. 08, 2006
Kenichi Yamamoto, Kanagawa, JP;
Masashige Moritoki, Kanagawa, JP;
Takashi Shimane, Kanagawa, JP;
Kazumi Saito, Kanagawa, JP;
Hiroaki Tomimori, Kanagawa, JP;
Takamasa Itou, Kanagawa, JP;
Kousei Ushijima, Kumamoto, JP;
Katsuro Tateyama, Kumamoto, JP;
Kenichi Yamamoto, Kanagawa, JP;
Masashige Moritoki, Kanagawa, JP;
Takashi Shimane, Kanagawa, JP;
Kazumi Saito, Kanagawa, JP;
Hiroaki Tomimori, Kanagawa, JP;
Takamasa Itou, Kanagawa, JP;
Kousei Ushijima, Kumamoto, JP;
Katsuro Tateyama, Kumamoto, JP;
NEC Electronics Corporation, Kanagawa, JP;
Abstract
An increase of the via resistance resulted due to the presence of the altered layer that has been formed and grown after the formation of the via hole can be effectively prevented, thereby providing an improved reliability of the semiconductor device. A method includes: forming a TiN film on the semiconductor substrate; forming an interlayer insulating film on a surface of the TiN film; forming a resist film on a surface of the interlayer insulating film; etching the semiconductor substrate having the resist film formed thereon to form an opening, thereby partially exposing the TiN film; plasma-processing the exposed portion of the TiN film to remove an altered layer formed in the exposed portion of the TiN film; and stripping the resist film via a high temperature-plasma processing.