The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 10, 2010
Filed:
Aug. 31, 2006
Michael Leddige, Beaverton, OR (US);
James A. Mccall, Beaverton, OR (US);
Ajit Deosthali, Portland, OR (US);
Brad Larson, Hillsboro, OR (US);
Michael Leddige, Beaverton, OR (US);
James A. McCall, Beaverton, OR (US);
Ajit Deosthali, Portland, OR (US);
Brad Larson, Hillsboro, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A stackable die mounting system with an efficient interconnect is disclosed that can have a base chip carrier to interconnect a base integrated circuit die to a circuit board on a first side and to a second stacked integrated circuit on a second side. The second side can include a first region having a pad out configuration of a first input output (I/O) to transmit data to be stored by the stacked integrated circuit die. The base chip carrier can have a second region with a pad out of a second I/O that is configured to receive data transmitted by the stacked integrated circuit die wherein the pad out of the second port is translated and rotated about an axis from the pad out of the first region such that a busses with different functions can be vertically integrated from the circuit board.